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/home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_timg/esp32/home/ricardo/.espressif/v6.1/esp-idf/components/soc/esp32/include/soc/home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_timg/include/haltimer_periph.c
interrupts.hperiph_defs.hclk_tree_defs.htimer_periph.hmodule_nameETS_RWBLE_INTR_SOURCEETS_PWM0_INTR_SOURCEETS_MPU_IA_INTR_SOURCEPERIPH_BT_BASEBAND_MODULEPERIPH_HSPI_MODULEETS_TG0_T1_LEVEL_INTR_SOURCEcharETS_I2S0_INTR_SOURCEPERIPH_UHCI0_MODULEshort intETS_SPI2_INTR_SOURCEPERIPH_MODULE_MAXETS_FROM_CPU_INTR3_SOURCEPERIPH_SPI_MODULEETS_TG1_T1_LEVEL_INTR_SOURCEETS_MAX_INTR_SOURCEPERIPH_BT_MODULEETS_CACHE_IA_INTR_SOURCEETS_BT_BB_NMI_SOURCEETS_WDT_INTR_SOURCEGNU C23 15.2.0 -ftls-model=local-exec -mdynconfig=xtensa_esp32.so -mlongcalls -mno-target-align -gdwarf-4 -ggdb -Os -std=gnu23 -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -ffunction-sections -fdata-sections -freorder-blocks -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -fno-stack-protector -fzero-init-padding-bits=all -fno-malloc-dceETS_EFUSE_INTR_SOURCEsoc_timg_gptimer_signal_desc_tETS_TG1_T1_EDGE_INTR_SOURCEETS_UART1_INTR_SOURCEETS_GPIO_INTR_SOURCE/home/ricardo/ElectroNext/Projects/Reflow plate/esp-idf-firmware/Reflow-plate/build/bootloaderETS_TG0_LACT_EDGE_INTR_SOURCEETS_SPI3_DMA_INTR_SOURCElong long intETS_I2S1_INTR_SOURCEETS_RWBT_NMI_SOURCEETS_TWAI_INTR_SOURCESOC_MOD_CLK_XTAL32KSOC_MOD_CLK_RTC_FASTlong intETS_TG0_WDT_LEVEL_INTR_SOURCEETS_TG1_LACT_LEVEL_INTR_SOURCEETS_LEDC_INTR_SOURCEETS_MMU_IA_INTR_SOURCEETS_TG1_LACT_EDGE_INTR_SOURCESOC_MOD_CLK_RTC_SLOWETS_TG1_T0_EDGE_INTR_SOURCEETS_UHCI0_INTR_SOURCESOC_MOD_CLK_REF_TICK/home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_timg/esp32/timer_periph.cSOC_MOD_CLK_APLLETS_ETH_MAC_INTR_SOURCEunsigned charETS_FROM_CPU_INTR1_SOURCESOC_MOD_CLK_XTALETS_SDIO_HOST_INTR_SOURCElong doubleETS_GPIO_NMI_SOURCEPERIPH_RNG_MODULEPERIPH_PHY_CALIBRATION_MODULEETS_TG0_LACT_LEVEL_INTR_SOURCESOC_MOD_CLK_INVALIDPERIPH_TIMG0_MODULEETS_TIMER1_INTR_SOURCEETS_UART2_INTR_SOURCEsigned charSOC_MOD_CLK_PLL_D2long long unsigned intunsigned intETS_SPI0_INTR_SOURCEETS_TG0_WDT_EDGE_INTR_SOURCEparent_moduleETS_FROM_CPU_INTR0_SOURCEETS_WIFI_BB_INTR_SOURCEshort unsigned intETS_TG1_T0_LEVEL_INTR_SOURCEPERIPH_UART1_MODULEETS_RMT_INTR_SOURCESOC_MOD_CLK_CPUETS_TG1_WDT_EDGE_INTR_SOURCEETS_UHCI1_INTR_SOURCEPERIPH_I2S0_MODULEETS_RWBT_INTR_SOURCEETS_BT_BB_INTR_SOURCEETS_RTC_CORE_INTR_SOURCEETS_TIMER2_INTR_SOURCEETS_RSA_INTR_SOURCEPERIPH_VSPI_MODULEETS_SLC1_INTR_SOURCEETS_SPI1_DMA_INTR_SOURCEPERIPH_WIFI_MODULElong unsigned intETS_BT_MAC_INTR_SOURCESOC_MOD_CLK_RC_FAST_D256ETS_SPI2_DMA_INTR_SOURCEETS_I2C_EXT0_INTR_SOURCEETS_PWM1_INTR_SOURCEirq_idETS_FROM_CPU_INTR2_SOURCESOC_MOD_CLK_APBETS_WIFI_MAC_NMI_SOURCEPERIPH_TIMG1_MODULEETS_SPI1_INTR_SOURCEETS_TG0_T0_EDGE_INTR_SOURCEETS_SPI3_INTR_SOURCEETS_TG0_T1_EDGE_INTR_SOURCEsoc_timg_gptimer_signalsSOC_MOD_CLK_PLL_F160MSOC_MOD_CLK_RC_FASTETS_RWBLE_NMI_SOURCEETS_WIFI_MAC_INTR_SOURCEETS_TG1_WDT_LEVEL_INTR_SOURCEETS_SLC0_INTR_SOURCEETS_I2C_EXT1_INTR_SOURCEETS_TG0_T0_LEVEL_INTR_SOURCEETS_PCNT_INTR_SOURCEPERIPH_UART2_MODULEshared_periph_module_tETS_UART0_INTR_SOURCEPERIPH_WIFI_BT_COMMON_MODULEGCC: (crosstool-NG esp-15.2.0_20251204) 15.2.0 
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