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Reflow-plate/build/bootloader/esp-idf/esp_hal_uart/libesp_hal_uart.a

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!<arch>
/ 0 0 0 0 874 `





ovuart_hal_get_sclkuart_hal_get_baudrateuart_hal_set_stop_bitsuart_hal_get_stop_bitsuart_hal_set_data_bit_numuart_hal_get_data_bit_numuart_hal_set_parityuart_hal_get_parityuart_hal_set_hw_flow_ctrluart_hal_get_hw_flow_ctrluart_hal_set_sw_flow_ctrluart_hal_set_at_cmd_charuart_hal_set_tx_idle_numuart_hal_set_dtruart_hal_set_rxfifo_full_thruart_hal_set_txfifo_empty_thruart_hal_set_wakeup_edge_thrduart_hal_get_wakeup_edge_thrduart_hal_set_modeuart_hal_is_hw_rts_enuart_hal_inverse_signaluart_hal_set_loop_backuart_hal_inituart_hal_get_symb_lenuart_hal_set_rx_timeoutuart_hal_get_max_rx_timeout_thrduart_hal_txfifo_rstuart_hal_rxfifo_rstuart_hal_tx_breakuart_hal_write_txfifouart_hal_read_rxfifouart_periph_signal// 40 `
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uart_hal_iram.c.obj/
uart_periph.c.obj/
uart_hal.c.obj/ 0 0 0 644 64956 `
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: ; 9 I8 : ; 9 I8 I !I/ 4: ; 9 I?<4G: ; 9  <01> /home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_uart/esp32/home/ricardo/.espressif/tools/xtensa-esp-elf/esp-15.2.0_20251204/xtensa-esp-elf/picolibc/include/machine/home/ricardo/.espressif/tools/xtensa-esp-elf/esp-15.2.0_20251204/xtensa-esp-elf/picolibc/include/sys/home/ricardo/.espressif/v6.1/esp-idf/components/soc/esp32/include/soc/home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_uart/include/haluart_periph.c_default_types.h_stdint.hinterrupts.huart_periph.hETS_FROM_CPU_INTR3_SOURCESOC_UART_PERIPH_SIGNAL_DSRSOC_UART_PERIPH_SIGNAL_MAXETS_LEDC_INTR_SOURCEETS_MMU_IA_INTR_SOURCEETS_TG0_T0_LEVEL_INTR_SOURCEETS_SPI3_DMA_INTR_SOURCElong long unsigned intETS_TG0_WDT_LEVEL_INTR_SOURCEETS_CACHE_IA_INTR_SOURCEETS_TIMER1_INTR_SOURCEuart_signal_conn_tETS_PCNT_INTR_SOURCElong long intsigned charETS_RMT_INTR_SOURCEuart_periph_sig_tETS_RWBT_INTR_SOURCElong intETS_UART1_INTR_SOURCEETS_WIFI_BB_INTR_SOURCEETS_RWBT_NMI_SOURCEETS_TG1_T0_LEVEL_INTR_SOURCE__uint32_tETS_SDIO_HOST_INTR_SOURCEETS_WIFI_MAC_NMI_SOURCESOC_UART_PERIPH_SIGNAL_CTSunsigned intETS_TG0_T0_EDGE_INTR_SOURCEETS_TG1_LACT_LEVEL_INTR_SOURCElong unsigned intGNU C23 15.2.0 -ftls-model=local-exec -mdynconfig=xtensa_esp32.so -mlongcalls -mno-target-align -gdwarf-4 -ggdb -Os -std=gnu23 -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -ffunction-sections -fdata-sections -freorder-blocks -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -fno-stack-protector -fzero-init-padding-bits=all -fno-malloc-dceETS_PWM1_INTR_SOURCEETS_TIMER2_INTR_SOURCEshort unsigned intiomux_funcETS_SPI3_INTR_SOURCEETS_SPI2_DMA_INTR_SOURCEETS_UHCI1_INTR_SOURCEETS_SPI1_DMA_INTR_SOURCEETS_FROM_CPU_INTR2_SOURCEETS_I2S0_INTR_SOURCEETS_UART2_INTR_SOURCEETS_BT_BB_NMI_SOURCEETS_TG0_T1_LEVEL_INTR_SOURCEETS_TG0_LACT_LEVEL_INTR_SOURCEETS_TG0_T1_EDGE_INTR_SOURCE/home/ricardo/ElectroNext/Projects/Reflow plate/esp-idf-firmware/Reflow-plate/build/bootloaderlong doubleETS_RTC_CORE_INTR_SOURCEETS_FROM_CPU_INTR1_SOURCEETS_BT_BB_INTR_SOURCEETS_I2C_EXT0_INTR_SOURCEETS_MAX_INTR_SOURCESOC_UART_PERIPH_SIGNAL_RXETS_TG0_LACT_EDGE_INTR_SOURCEETS_SPI1_INTR_SOURCESOC_UART_PERIPH_SIGNAL_RTSint32_tunsigned charETS_RSA_INTR_SOURCEETS_TWAI_INTR_SOURCEETS_RWBLE_NMI_SOURCEshort intETS_MPU_IA_INTR_SOURCESOC_UART_PERIPH_SIGNAL_DTRETS_I2S1_INTR_SOURCEinputETS_SLC1_INTR_SOURCEETS_GPIO_NMI_SOURCEuint32_tETS_TG1_WDT_EDGE_INTR_SOURCEsignalETS_WIFI_MAC_INTR_SOURCEETS_FROM_CPU_INTR0_SOURCEcharETS_TG1_WDT_LEVEL_INTR_SOURCEETS_TG1_T0_EDGE_INTR_SOURCE/home/ricardo/.espressif/v6.1/esp-idf/components/esp_hal_uart/esp32/uart_periph.cETS_WDT_INTR_SOURCEETS_EFUSE_INTR_SOURCEETS_TG1_LACT_EDGE_INTR_SOURCE__int32_tETS_I2C_EXT1_INTR_SOURCEETS_PWM0_INTR_SOURCEETS_RWBLE_INTR_SOURCESOC_UART_PERIPH_SIGNAL_TXETS_SPI2_INTR_SOURCEpinsETS_BT_MAC_INTR_SOURCEETS_GPIO_INTR_SOURCEETS_UHCI0_INTR_SOURCEuart_periph_signalETS_SPI0_INTR_SOURCEETS_TG1_T1_EDGE_INTR_SOURCEdefault_gpioETS_ETH_MAC_INTR_SOURCEETS_TG0_WDT_EDGE_INTR_SOURCEETS_UART0_INTR_SOURCEETS_SLC0_INTR_SOURCEETS_TG1_T1_LEVEL_INTR_SOURCEGCC: (crosstool-NG esp-15.2.0_20251204) 15.2.0 Xtensa_InfoUSE_ABSOLUTE_LITERALS=0
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