Reflow-plate/build/esp-idf/esp_common/libesp_common.a

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/home/ricardo/.espressif/v6.1/esp-idf/components/esp_common/src/home/ricardo/.espressif/tools/xtensa-esp-elf/esp-15.2.0_20251204/xtensa-esp-elf/lib/gcc/xtensa-esp-elf/15.2.0/include/home/ricardo/.espressif/v6.1/esp-idf/components/esp_common/include/home/ricardo/.espressif/v6.1/esp-idf/components/soc/esp32/include/soc/home/ricardo/.espressif/v6.1/esp-idf/components/log/include/home/ricardo/.espressif/tools/xtensa-esp-elf/esp-15.2.0_20251204/xtensa-esp-elf/picolibc/includeesp_err_to_name.c
stddef.hesp_err.hinterrupts.hesp_log_level.hstdio.hstring.h
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ETS_RWBLE_INTR_SOURCEETS_PWM0_INTR_SOURCEETS_MPU_IA_INTR_SOURCEesp_err_msg_tablesnprintfesp_unknown_msgETS_TG1_T0_LEVEL_INTR_SOURCEETS_TG0_T1_LEVEL_INTR_SOURCEETS_I2S0_INTR_SOURCEshort intsize_tETS_SPI2_INTR_SOURCEETS_MMU_IA_INTR_SOURCEETS_TG1_WDT_EDGE_INTR_SOURCEesp_err_to_name_rETS_FROM_CPU_INTR3_SOURCEETS_TG1_T1_EDGE_INTR_SOURCEbuflenETS_TG1_T1_LEVEL_INTR_SOURCEETS_MAX_INTR_SOURCEETS_CACHE_IA_INTR_SOURCEETS_BT_BB_NMI_SOURCEETS_WDT_INTR_SOURCEETS_RWBT_INTR_SOURCEETS_EFUSE_INTR_SOURCEETS_UART1_INTR_SOURCEETS_GPIO_INTR_SOURCEETS_TG0_LACT_EDGE_INTR_SOURCEesp_err_msg_tETS_SPI3_DMA_INTR_SOURCElong long intESP_LOG_MAXETS_RWBT_NMI_SOURCEETS_TWAI_INTR_SOURCEcharlong intETS_TG0_WDT_LEVEL_INTR_SOURCEETS_TG1_LACT_LEVEL_INTR_SOURCEETS_LEDC_INTR_SOURCEESP_LOG_INFOETS_TG1_LACT_EDGE_INTR_SOURCEETS_TG1_T0_EDGE_INTR_SOURCEETS_UHCI0_INTR_SOURCEETS_TIMER1_INTR_SOURCEETS_ETH_MAC_INTR_SOURCEETS_FROM_CPU_INTR1_SOURCEETS_SDIO_HOST_INTR_SOURCElong doubleETS_GPIO_NMI_SOURCEunsigned charETS_TG0_LACT_LEVEL_INTR_SOURCEstrlcpyETS_UART2_INTR_SOURCE/home/ricardo/ElectroNext/Projects/Reflow plate/esp-idf-firmware/V0.1/buildsigned charlong long unsigned intunsigned intcodeETS_SPI0_INTR_SOURCEETS_TG0_WDT_EDGE_INTR_SOURCEETS_FROM_CPU_INTR0_SOURCEETS_WIFI_BB_INTR_SOURCEshort unsigned intETS_RMT_INTR_SOURCE_Boolstrerror_rETS_UHCI1_INTR_SOURCEESP_LOG_NONE/home/ricardo/.espressif/v6.1/esp-idf/components/esp_common/src/esp_err_to_name.cETS_BT_BB_INTR_SOURCEETS_RTC_CORE_INTR_SOURCEETS_TIMER2_INTR_SOURCEETS_RSA_INTR_SOURCEETS_I2S1_INTR_SOURCEETS_SLC1_INTR_SOURCEESP_LOG_WARNESP_LOG_DEBUGETS_SPI1_DMA_INTR_SOURCEETS_I2C_EXT0_INTR_SOURCEGNU C23 15.2.0 -ftls-model=local-exec -mdynconfig=xtensa_esp32.so -mlongcalls -gdwarf-4 -ggdb -Og -std=gnu23 -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -ffunction-sections -fdata-sections -fno-shrink-wrap -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -fzero-init-padding-bits=all -fno-malloc-dcelong unsigned intETS_BT_MAC_INTR_SOURCEETS_SPI2_DMA_INTR_SOURCEETS_PWM1_INTR_SOURCEETS_FROM_CPU_INTR2_SOURCEESP_LOG_VERBOSEETS_WIFI_MAC_NMI_SOURCEETS_SPI1_INTR_SOURCEETS_TG0_T0_EDGE_INTR_SOURCEETS_SPI3_INTR_SOURCEETS_TG0_T1_EDGE_INTR_SOURCEETS_RWBLE_NMI_SOURCEETS_WIFI_MAC_INTR_SOURCEETS_TG1_WDT_LEVEL_INTR_SOURCEETS_SLC0_INTR_SOURCEETS_I2C_EXT1_INTR_SOURCEETS_TG0_T0_LEVEL_INTR_SOURCEETS_PCNT_INTR_SOURCEesp_err_to_nameESP_LOG_ERROResp_err_tETS_UART0_INTR_SOURCEGCC: (crosstool-NG esp-15.2.0_20251204) 15.2.0 
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